Invited Speakers

Prof. Onur Mutlu



Department of Computer Science, ETH Zurich, Zurich, Swiss
Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, USA

Title: Future Computing Architectures

Brief abstract: This talk will cover some key platform design issues that we consider critical to solve in modern and future computing systems. Our focus will be on the issues related to the memory system and data access, a critical bottlenecks in the high-performance computing platforms of today. Three key issues we will discuss are: 1) designing fundamentally secure/reliable/safe architectures, 2) enabling data-centric and hence fundamentally energy-efficient architectures, and 3) reducing both latency and energy consumption by tackling the fixed-latency/energy mindset. We will focus on both problems and new solution directions.

Bio: Onur Mutlu is a Professor of Computer Science at ETH Zurich. He is also a faculty member at Carnegie Mellon University, where he previously held the William D. and Nancy W. Strecker Early Career Professorship. His current broader research interests are in computer architecture, systems, and bioinformatics. He is especially interested in interactions across domains and between applications, system software, compilers, and microarchitecture, with a major current focus on memory and storage systems. He obtained his PhD and MS in ECE from the University of Texas at Austin and BS degrees in Computer Engineering and Psychology from the University of Michigan, Ann Arbor. His industrial experience spans starting the Computer Architecture Group at Microsoft Research (2006-2009), and various product and research positions at Intel Corporation, Advanced Micro Devices, VMware, and Google. He received the inaugural IEEE Computer Society Young Computer Architect Award, the inaugural Intel Early Career Faculty Award, faculty partnership awards from various companies, and a healthy number of best paper or "Top Pick" paper recognitions at various computer systems and architecture venues. His computer architecture course lectures and materials are freely available on YouTube, and his research group makes software artifacts freely available online. For more information, please see his webpage at http://people.inf.ethz.ch/omutlu/.



Prof. Ernesto Damiani



Dipartimento di Informatica Giovanni degli Antoni, Università degli Studi di Milano, Milano, Italy
Department of Electrical and Computer Engineering, Kalifa University, Abu Dhabi, UAE

Title: Distributing Artificial Intelligence/Big Data Pipelines with TOREADOR

Brief abstract: In the era of the Internet of Things, huge volumes of highly dimensional data points are made available at an unprecedented velocity. Computations on such data include: (i) quality improvements (interpolation, sparsity reduction) to make them suitable for feeding deep learning models, (ii) machine learning models (ML) training and tuning (iii) ML models' in-production operation. We discuss center-periphery distribution and parallelization decisions for such computations, highlighting the dependencies and potential interference between such decisions. We present a technology-independent methodology addressing such dependencies and interference for running efficient Artificial Intelligence analytics.

Bio: Ernesto Damiani is a professor of computer science at the University of Milan, where he leads the SEcure Service-oriented Architectures Research (SESAR) Lab. Ernesto is the Founding Director of the IoT Research Center at Khalifa University, in the UAE. Ernesto Damiani received a honorary doctorate from Institut National des Sciences Appliquées de Lyon, France (2017) for his contributions to research and teaching on Big Data analytics. Ernesto is the Principal Investigator of the H2020 TOREADOR project on Big data as a service. His research spans Cyber-security, Big Data and cloud/edge processing, where he has published over 600 peer-reviewed articles and books. He is Distinguished Scientist of ACM and a recipient of the 2017 Stephen Yau Award.



Dr. Kostas Katrinis



IBM Dublin Technology Campus, Dublin, Ireland

Title: "Will I remember when I am free?" - Views and challenges on prototyping emerging disaggregated memory systems

Brief abstract: Modern computer systems, clusters and datacenters have been for long designed as stacks of monolithic blocks built around the boundaries of the server mainboard. Recently, advanced R&D is making progress towards disaggregated, rack-scale systems. In this talk, we will review trends supporting this paradigm and main obstacles along the way to make component-level pooled computing efficient and effective. Taking a vertical view, from architecture to system software support and application migration, this talk will share lessons learned and challenges ahead when building a proof-of-concept disaggregated cloud system.

Bio: Kostas Katrinis is a Research Staff Member and Manager in IBM Research, where he leads the Next Generation Systems department in Ireland. He is active in systems research and innovation for cloud, edge and data-centric computing (system software, middleware, distributed systems), often crossing disciplines (analytics/cognitive workload awareness, co-design against emerging hadrware) to create impact in core innovation imperatives. He has acted as PI/co-PI in up to multi-million R&D investments, including multi-organization consortia. He holds a Ph.D. in Communication Networks from ETH Zurich, Switzerland (2006).



Prof. Kevin Hammond



Department of Computer Science, University of St Andrews

Title: Pattern-Based Parallel Programming for Heterogeneous Multicore/Manycore Machines

Brief abstract: One of the major challenges that we face is how to empower software developers to use the new range of (possibly heterogeneous) increasingly parallel multicore/manycore systems. The focus of the RePhrase project is on producing new software engineering tools, techniques and methodologies for developing data-intensive applications in C++, targeting heterogeneous multicore/manycore systems that combine CPUs and GPUs into a coherent parallel platform. Data-intensive applications are one of the most important and commonly encountered classes of industrial application. Such applications are often potentially highly parallel and are a clear match to emerging heterogeneous parallel architectures. However, exploiting this potential effectively can be difficult: it is even harder to obtain good performance for parallel data-intensive applications than for compute- intensive applications, since many additional issues related to data management need to be taken into account. These include structuring the data to make it efficient to access and to process, placement/migration/replication of the data to allow fast parallel access, ensuring data consistency etc. The talk describes how the RePhrase project tackles these issues and more.

Bio: Prof Kevin Hammond is a (full) Professor at the University of St Andrews. He has worked extensively in the field of advanced programming language design and implementation, with a focus on cost and performance issues, especially for parallel systems. His work concentrates on declarative language designs, notably functional programming languages. He served on the international design committee for the standard non-strict functional language Haskell, and worked on the dominant Haskell compiler, GHC. He has published over 100 books, book chapters, journal papers and other refereed publications, focusing on parallel computing, real-time systems, time- and space-cost analysis, adaptive runtime environments, domain-specific programming languages, lightweight concurrency, high-level programming language design, and performance monitoring/visualisation. He has run over 20 successful national and international research projects, including coordinating the EU Horizon 2020 Project RePhrase (IST-644235) the FP7 STReP ParaPhrase (IST-288570), and the FP6 STReP EmBounded (IST-510255). He has strong connections with both academia and industry, having collaborated with over 100 institutions and companies on various research projects and technical research papers. He is the current Director of SICSA, the Scottish Informatics and Computer Science Alliance, that pools the effort of the 14 Scottish Universities in research, knowledge exchange and education, and sits on the Governance Boards of the Scottish Data Lab Innovation Centre and the Scottish Digital Skills Partnership. Kevin Hammond is a senior member of the ACM, a founder member of IFIP WG 2.11 (Generative Programming), and a full member of the HiPEAC network of excellence (High-Performance Embedded Architectures and Compilation),



Prof. Marco Aldinucci



Department of Computer Science, University of Turin

Title: Toward Near Data Processing service computing

Brief abstract: In the realm of HPC, message passing has remained the programming paradigm of choice for over twenty years, and by extension to fairly new area of high-performance data processing. In message passing, each communication is orchestrated by the developer-based on precise knowledge of code, overhead, and data partitions. PGAS (Partitioned Global Address Space) programming aims at tackling with this complexity by (at least) abstracting data decomposition and the mapping of processes onto the hardware and promote distributed In-Memory processing for large data sets. There exist a variety of choices for PGAS languages and implementations, ranging from brand new languages to extension existing approaches such as MPI and OpenMP. None of them is (yet) in the mainstream of parallel programming or able to support interoperability with legacy code. In this talk we review these approaches and we discuss the possibility to generalise the PGAS into the mainstream C++ STL and then to service computing by way of a Near Data Processing (NDP) approach.

Bio: Marco Aldinucci is a professor at Computer Science Department of the University of Torino (UNITO) since 2014. He got his PhD at University of Pisa in 2003. He worked as engineer at Quadrics Supercomputing World (QSW) and as researcher at Italian National Research Agency (ISTI-CNR). He is the author of over a hundred papers in international journals and conference proceeding. He has been participating in over 20 national and international research projects concerning parallel and autonomic computing, including EC H2020 Rephrase, Toreador, Fortissimo2, HiPEAC. He is the recipient of the HPC Advisory Council University Award 2011, the IBM Faculty Award 2015. He has been the P.I. of the the NVidia Research Center at University of Turin, he is the P.I. of the parallel computing research group at UNITO, the director of the HPC laboratory at innovation centre ICxT@UNITO, and vice-president of the Competency Centre for Scientific Computing C3S@UNITO. His research is focused on parallel and distributed computing.



Contact

For any request, please contact pdp2018@easychair.org

Programme co-chairs


Ivan Merelli [Web ] -- Istituto di Tecnologie Biomediche, Consiglio Nazionale delle Ricerche, Italy
Pietro Liò [Web ] -- Computer Laboratory, University of Cambridge, UK
Igor Kotenko [Web ] -- SPIIRAS, ITMO University, St. Petersburg, Russia

Supported by


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